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{{OBDtr| 0x04 | lev_id |FFFF00| 01 00 00 00 | 0 | level 0 }} | {{OBDtr| 0x04 | lev_id |FFFF00| 01 00 00 00 | 0 | level 0 }} | ||
{{OBDtr| 0x08 | int32 |FFC8C8| 00 00 FF 7F | 0, 0, 255; 127 | trigger colour (blue, green, red); trigger transparency; both always the same }} | {{OBDtr| 0x08 | int32 |FFC8C8| 00 00 FF 7F | 0, 0, 255; 127 | trigger colour (blue, green, red); trigger transparency; both always the same }} | ||
{{OBDtr| 0x0C | int32 |FFFFC8| 00 00 00 00 | 0 | | {{OBDtr| 0x0C | int32 |FFFFC8| 00 00 00 00 | 0 | ignored }} | ||
{{OBDtr| 0x10 | int32 |C8FFC8| 00 00 00 00 | 0 | | {{OBDtr| 0x10 | int32 |C8FFC8| 00 00 00 00 | 0 | ignored }} | ||
{{OBDtr| 0x14 | int32 |C8FFFF| 00 00 80 3F | 1.000000 | | {{OBDtr| 0x14 | int32 |C8FFFF| 00 00 80 3F | 1.000000 | ignored }} | ||
{{OBDtr| 0x18 | int32 |FFC8FF| 01 76 02 00 | 630 | link to 00630-.[[OBD:M3GM|M3GM]] }} | {{OBDtr| 0x18 | int32 |FFC8FF| 01 76 02 00 | 630 | link to 00630-.[[OBD:M3GM|M3GM]] }} | ||
{{OBDtr| 0x1C | int32 |FFC800| 00 00 00 00 | 0 | OBLS link; never used }} | {{OBDtr| 0x1C | int32 |FFC800| 00 00 00 00 | 0 | OBLS link; never used }} | ||
{{OBDtr| 0x20 | int32 |C800C8| 00 00 00 00 | 0 | | {{OBDtr| 0x20 | int32 |C800C8| 00 00 00 00 | 0 | ignored }} | ||
{{OBDtr| 0x24 | int32 |C87C64| 01 6E 02 00 | 622 | link to 00622-trigger_emitter_0.[[OBD:TRGE|TRGE]]; always the same }} | {{OBDtr| 0x24 | int32 |C87C64| 01 6E 02 00 | 622 | link to 00622-trigger_emitter_0.[[OBD:TRGE|TRGE]]; always the same }} | ||
{{OBDtr| 0x28 | int32 |B0C3D4| 01 74 02 00 | 628 | link to 00628-eyearc.[[OBD:OBAN|OBAN]] }} | {{OBDtr| 0x28 | int32 |B0C3D4| 01 74 02 00 | 628 | link to 00628-eyearc.[[OBD:OBAN|OBAN]] }} |
edits